NUMA 다중 프로세서에서의 캐쉬 일관성 프로토콜

Cache Coherence Protocols in NUMA Multiprocessors

저자
모상만, 한우종, 윤석한
권호
13권 5호 (통권 53)
논문구분
일반 논문
페이지
11-0
발행일자
1998.10
DOI
10.22648/ETRI.1998.J.130502
초록
Recently, scalable multiprocessor systems are actively developed for general-purpose computing, which are based on distributed shared memory (DSM) architecture to boost up both programmability and scalability. In this paper, we survey and analyze cache coherence protocols in non-uniform memory access (NUMA) multiprocessor systems. In particular, it has been easily inferred that specialized hardware suitable for NUMA multiprocessor systems with commodity symmetric multiprocessors (SMPs) is highly required. The cache coherence protocol combined with specialized hardware can significantly improve the performance and scalability of NUMA multiprocessor systems, providing better programmability.
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